1. Field of the Invention
The present invention relates to a semiconductor chip assembly, and more particularly to a semiconductor chip assembly with a ground plane and its method of manufacture.
2. Description of the Related Art
Semiconductor chips have power, ground and input/output pads that must be connected to external circuitry in order to function as part of an electronic system. The connection media is typically an array of metallic leads (e.g., a lead frame) or a support circuit (e.g., a substrate), although the connection can be made directly to a circuit panel (e.g., a mother board). Several connection techniques are widely used. These include wire bonding, tape automated bonding (TAB) and flip-chip bonding.
First-level packages include a chip and a connection technique. First-level packages provide contacts connected to the power, ground and input/output pads to provide power, ground and signal transmission for the chip. First-level packages also provide thermal expansion compatibility with the chip, heat removal from the chip, and low signal transmission delay and electrical noise.
First-level packages include through-hole packages such as the dual in-line package (DIP), single in-line package (SIP), zig-zag in-line package (ZIP) and pin grid array (PGA). First-level packages also include surface mount packages such as the small outline package (SOP), quad flat package (QFP), leadless chip carrier (LCC), plastic leaded chip carrier (PLCC), ball grid array (BGA) and chip scale package (CSP).
First-level packages can be a single-chip module (SCM) or a multi-chip module (MCM), depending on whether the package contains a single chip or multiple chips. Multi-chip modules provide the most circuits in the least amount of space, and are widely used in mainframes, workstations and consumer electronics as well as medical, aerospace, automotive and telecommunication devices.
Second-level packages includes groups of first-level packages along with other components such as capacitors, resistors, inductors, filters, switches, optical devices and radio frequency devices, mounted on a printed circuit board (PCB).
Telecommunication devices require chips to operate at high frequencies such as 30 to 300 GHz. At these frequencies, the signal lines generate electromagnetic and electrostatic fields which can cause cross-talk in adjacent signal lines. Cross-talk can increase signal line impedance, signal transmission delays and impedance mismatching leading to uncontrolled signal reflections. Thus, cross-talk is a critical problem that requires some form of compensation.
Ground planes are common in first-level packages and printed circuit boards to provide a signal return path and increase signal integrity.
Ground planes in first-level packages not only reduce cross-talk, but also reduce interference from external noise, prevent passage of incoming neutrons and increase heat removal from the chip. As a result, ground planes in first-level packages improve high frequency stability, noise immunity, isolation characteristics and heat dissipation. Furthermore, ground planes in first-level packages provide performance integration and hardware miniaturization with short design time and low cost that surpass ground planes in printed circuit boards.
Ground planes in first-level packages have been provided by the flag of the lead frame that supports the chip. However, the chip is typically mechanically attached to the flag by solder, which can run-out from underneath the chip. In addition, the chip is typically electrically connected to the flag by a lengthy wire bond, which can increase inductance and reduce power efficiency.
Ground planes in first-level packages have also been provided by a metal plate that is incorporated into a plastic encapsulant. However, it is difficult to orient and mechanically assemble the chip, the lead frame and the ground plane before the encapsulant is formed to provide a mechanically stable structure.
In view of the various development stages and limitations in currently available semiconductor chip assemblies, there is a need for a semiconductor chip assembly with a ground plane that is cost-effective, reliable, manufacturable, versatile, provides excellent mechanical and electrical properties, and makes advantageous use the particular connection joint technique best suited for a given application.